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1

HIGH-SPEED AND HIGH-DATA-BANDWIDTH TRANSMITTER AND RECEIVER FOR MULTI-CHANNEL SERIAL DATA COMMUNICATION WITH CMOS TECHNOLOGY

FUKAISHI, MUNEO, NAKAMURA, KAZUYUKI, YOTSUYANAGI, MICHIO

Journal:

International Journal of High Speed Electronics and Systems

Year:

2001

Language:

english

File:

PDF, 2.50 MB

english, 2001

2

[IEEE 2012 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) - Bangkok, Thailand (2012.12.3-2012.12.5)] 2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC) - Design of robust digital controller for interleave PFC boost converter with DC-DC converter load

Fukaishi, Yuji, Higuchi, Kohji, Furuya, Hiroyuki, Satake, Yuki

Year:

2012

Language:

english

File:

PDF, 322 KB

english, 2012

3

Effectiveness of a hot-filament chemical vapor deposition method for preparation of a boron-doped superconducting diamond film with higher superconducting transition temperature

Doi, T., Fukaishi, T., Hiramatsu, C., Wakita, T., Hirai, M., Muraoka, Y., Yokoya, T., Kato, Y., Izumi, Y., Muro, T., Tamenori, Y.

Journal:

Diamond and Related Materials

Year:

2012

Language:

english

File:

PDF, 347 KB

english, 2012

4

[IEEE 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (5-7 Feb. 2001)] 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) - 2.5 GHz 4-phase clock generator with scalable and no feedback loop architecture

Yamguchi, K., Fukaishi, M., Sakamoto, T., Akiyama, N., Nakamura, K.

Year:

2001

Language:

english

File:

PDF, 338 KB

english, 2001

5

[IEEE 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (5-7 Feb. 2001)] 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) - A 2 Gb/s 21 CH low-latency transceiver circuit for inter-processor communication

Tanahashi, T., Kurisu, M., Yamaguchi, H., Nedachi, T., Arai, M., Tomari, S., Matsuzaki, T., Nakamura, K., Fukaishi, M., Naramoto, S., Sato, T.

Year:

2001

Language:

english

File:

PDF, 393 KB

english, 2001

6

A technique for compensating for temperature variation in low-supply-voltage GaAs DCFL circuits

Tadashi Maeda, Keiichi Numata, Yasuo Ohno, Hikaru Hida, Masatoshi Tokushima, Muneo Fukaishi, Masaoki Ishikawa, Masahiro Fujii

Journal:

Solid-State Electronics

Year:

1996

Language:

english

File:

PDF, 475 KB

english, 1996

7

A Branch and Bound Algorithm for Solving Low Rank Linear Multiplicative and Fractional Programming Problems

Hiroshi Konno, Kenji Fukaishi

Journal:

Journal of Global Optimization

Year:

2000

Language:

english

File:

PDF, 244 KB

english, 2000

8

A 30-MHz–2.4-GHz CMOS Receiver With Integrated RF Filter and Dynamic-Range-Scalable Energy Detector for Cognitive Radio Systems

Kitsunezuka, M., Kodama, H., Oshima, N., Kunihiro, K., Maeda, T., Fukaishi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2012

Language:

english

File:

PDF, 1.67 MB

english, 2012

9

[IEEE 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (7-9 Feb. 2000)] 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056) - A 20 Gb/s CMOS multi-channel transmitter and receiver chip set for ultra-high resolution digital display

Fukaishi, M., Nakamura, K., Heiuchi, H., Hirota, Y., Nakazawa, Y., Ikeno, H., Hayama, H., Yotsuyanagi, M.

Year:

2000

Language:

english

File:

PDF, 256 KB

english, 2000

10

The management of prenatally diagnosed sacrococcygeal teratoma

Hitoshi Ikeda, Hiroyasu Okumura, Kikuo Nagashima, Kei Shinozaki, Yukio Nagamachi, Takao Fukaishi, Hiroyoshi Ebara, Masao Sakaguchi

Journal:

Pediatric Surgery International

Year:

1990

Language:

english

File:

PDF, 215 KB

english, 1990

11

Property improvement of rice by the addition of enzymes that are active during cooking

Shigenobu Ina, Keiko Kato, Shizuka Nakamura, Mitsuo Fukaishi, Makoto Akao, Hitomi Kumagai, Hidetoshi Sakurai

Journal:

Journal of Bioscience and Bioengineering

Year:

2009

Language:

english

File:

PDF, 55 KB

english, 2009

12

0.1-μm p+-GaAs gate HJFET's fabricated using two-step dry-etching and selective MOMBE growth techniques

Wada, S., Furuhata, N., Tokushima, M., Fukaishi, M., Hida, H., Maeda, T.

Journal:

IEEE Transactions on Electron Devices

Year:

1998

Language:

english

File:

PDF, 212 KB

english, 1998

13

0.2-μm fully-self-aligned Y-shaped gate HJFET's with reduced gate-fringing capacitance fabricated using collimated sputtering and electroless Au-plating

Wada, S., Tokushima, M., Fukaishi, M., Matsuno, N., Yano, H., Hida, H., Maeda, T.

Journal:

IEEE Transactions on Electron Devices

Year:

1998

Language:

english

File:

PDF, 259 KB

english, 1998

14

A 1 Tb/s 3 W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link

Miura, N., Mizoguchi, D., Inoue, M., Niitsu, K., Nakagawa, Y., Tago, M., Fukaishi, M., Sakurai, T., Kuroda, T.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2007

Language:

english

File:

PDF, 3.30 MB

english, 2007

15

A 60 GHz Power Amplifier With 14.5 dBm Saturation Power and 25% Peak PAE in CMOS 65 nm SOI

Siligaris, A., Hamada, Y., Mounet, C., Raynaud, C., Martineau, B., Deparis, N., Rolland, N., Fukaishi, M., Vincent, P.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2010

Language:

english

File:

PDF, 2.16 MB

english, 2010

16

A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer With a Time-Windowed Time-to-Digital Converter

Tokairin, T., Okada, M., Kitsunezuka, M., Maeda, T., Fukaishi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2010

Language:

english

File:

PDF, 1.50 MB

english, 2010

17

A Low-IF/Zero-IF Reconfigurable Analog Baseband IC With an I/Q Imbalance Cancellation Scheme

Kitsunezuka, M., Tokairin, T., Maeda, T., Fukaishi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2011

Language:

english

File:

PDF, 1.75 MB

english, 2011

18

Introduction to the Special Section on the 2010 Asian Solid-State Circuits Conference (A-SSCC2010)

Fukuma, M., Fukaishi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2011

Language:

english

File:

PDF, 469 KB

english, 2011

19

Robust digital control of a DC–DC buck converter with low frequency samplings

Yuji Fukaishi, Yoshihiro Ohta, Kohji Higuchi, Eiji Takegami, Satoshi Tomioka, Kosin Chamnongthai

Journal:

Artificial Life and Robotics

Year:

2012

Language:

english

File:

PDF, 400 KB

english, 2012

20

A high-speed low-power tri-state driver flip flop for ultra-low supply voltage GaAs heterojunction FET LSI's

Maeda, T., Numata, K., Tokushima, M., Ishikawa, M., Fukaishi, M., Hida, H., Ohno, Y.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1996

Language:

english

File:

PDF, 967 KB

english, 1996

21

An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF)

Maeda, T., Numata, K., Fujii, M., Tokushima, M., Wada, S., Fukaishi, M., Ishikawa, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1996

Language:

english

File:

PDF, 469 KB

english, 1996

22

A 4.25-Gb/s CMOS fiber channel transceiver with asynchronous tree-type demultiplexer and frequency conversion architecture

Fukaishi, M., Nakamura, K., Sato, M., Tsutsui, Y., Kishi, S., Yotsuyanagi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1998

Language:

english

File:

PDF, 539 KB

english, 1998

23

A 2.125-Gb/s BiCMOS fiber channel transmitter for serial data communications

Fukaishi, M., Nakamura, S., Tajima, A., Kinoshita, Y., Suemura, Y., Suzuki, H., Itani, T., Miyamoto, H., Henmi, N., Yamazaki, T., Yotsuyanagi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1999

Language:

english

File:

PDF, 433 KB

english, 1999

24

A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays

Fukaishi, M., Nakamura, K., Heiuchi, H., Hirota, Y., Nakazawa, Y., Ikeno, H., Hayama, H., Yotsuyanagi, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2000

Language:

english

File:

PDF, 320 KB

english, 2000

25

A 2.5-GHz four-phase clock generator with scalable no-feedback-loop architecture

Yamaguchi, K., Fukaishi, M., Sakamoto, T., Akiyama, N., Nakamura, K.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2001

Language:

english

File:

PDF, 309 KB

english, 2001

26

A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer

Kudoh, Y., Fukaishi, M., Mizuno, M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2003

Language:

english

File:

PDF, 576 KB

english, 2003

27

Efficient Use of the Spectrum

Kitsunezuka, M., Kunihiro, K., Fukaishi, M.

Journal:

IEEE Microwave Magazine

Year:

2012

Language:

english

File:

PDF, 1.60 MB

english, 2012

28

Technology Challenges for a “Symbiotic Society–Toward a Post-Ubiquitous Era” [Conference Reports]

Bing-Lin Gu, Zhihua Wang, Masao Fukuma, Muneo Fukaishi

Journal:

IEEE Solid-State Circuits Magazine

Year:

2010

Language:

english

File:

PDF, 1.41 MB

english, 2010

29

[IEEE 2010 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2010.02.7-2010.02.11)] 2010 IEEE International Solid-State Circuits Conference - (ISSCC) - A 2.1-to-2.8GHz all-digital frequency synthesizer with a time-windowed TDC

Tokairin, Takashi, Okada, Mitsuji, Kitsunezuka, Masaki, Maeda, Tadashi, Fukaishi, Muneo

Year:

2010

Language:

english

File:

PDF, 616 KB

english, 2010

30

[IEEE 2013 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON 2013) - Krabi, Thailand (2013.05.15-2013.05.17)] 2013 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology - Robust digital control for interleaved PFC boost converter using approximate 2DOF

Satake, Yuki, Furuya, Hiroyuki, Mochizuki, Yohei, Fukaishi, Yuji, Higuchi, Kohji, Chamnongthai, Kosin

Year:

2013

Language:

english

File:

PDF, 727 KB

english, 2013

31

[IEEE 1997 Bipolar/BiCMOS Circuits and Technology Meeting - Minneapolis, MN, USA (28-30 Sept. 1997)] Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting - An advanced 0.25-μm BiCMOS process integration technology for multi-GHz communication LSIs

Kinoshita, Y., Suzuki, H., Nakamura, S., Fukaishi, M., Tajima, A., Sucmura, Y., Itani, T., Miyamoto, H., Fujii, H., Yotsuyanagi, M., Henmi, N., Yamazaki, T.

Year:

1997

Language:

english

File:

PDF, 369 KB

english, 1997

32

[IEEE 1998 Symposium on VLSI Circuits Digest of Technical Papers - Honolulu, HI, USA (11-13 June 1998)] 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.98CH36215) - A 6 Gbps CMOS phase detecting DEMUX module using half-frequency clock

Nakamura, K., Fukaishi, M., Abiko, H., Matsumoto, A., Yotsuyanagi, M.

Year:

1998

Language:

english

File:

PDF, 409 KB

english, 1998

33

[IEEE 2002 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (13-15 June 2002)] 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) - 1.5 Gbps, 5150 ppm spread spectrum SerDes PHY with a 0.3 mW, 1.5 Gbps level detector for serial ATA

Sugawara, M., Ishibashi, T., Ogasawara, K., Aoyama, M., Zwerg, M., Glowinski, S., Kameyama, Y., Yanagita, T., Fukaishi, M., Shimoyama, S., Ishibashi, T., Noma, T.

Year:

2002

Language:

english

File:

PDF, 347 KB

english, 2002

34

[IEEE 2002 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (13-15 June 2002)] 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) - A 0.13-μm CMOS 5-Gb/s 10-meter 28 AWG cable transceiver with no-feedback-loop continuous-time post-equalizer

Kudoh, Y., Fukaishi, M., Mizuno, M.

Year:

2002

Language:

english

File:

PDF, 271 KB

english, 2002

35

[IEEE 2000 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (15-17 June 2000)] 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103) - A CMOS 50% duty cycle repeater using complementary phase blending

Nakamura, K., Fukaishi, M., Hirota, Y., Nakazawa, Y., Yotsuyanagi, M.

Year:

2000

Language:

english

File:

PDF, 216 KB

english, 2000

36

[IEEE ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. - San Francisco, CA, USA (Feb. 6-10, 2005)] ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. - Session 3 overview - backplane transceivers

Soyuer, M., Fukaishi, M.

Year:

2005

Language:

english

File:

PDF, 543 KB

english, 2005

37

[IEEE GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 - San Diego, CA, USA (29 Oct.-1 Nov. 1995)] GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 - Ultra low power consumption heterojunction FET 8:1 MUX/1:8 DEMUX for 2.4 Gbps optical fiber communication systems

Numata, K., Fujii, M., Maeda, T., Tokushima, M., Wada, S., Fukaishi, M., Ishikawa, M.

Year:

1995

Language:

english

File:

PDF, 465 KB

english, 1995

38

[IEEE 52nd Annual Device Research Conference - Boulder, CO (June 20-22, 1994)] 52nd Annual Device Research Conference - "A sub-0.25μm symmetric super self-aligned gate hjfet witn reduced gate fringing capacitance fabricated using electroless au plating and collimated sputtering"

Wada, S., Tokushima, M., Fukaishi, M., Matsuno, N., Yano, H., Hida, H.

Year:

1994

Language:

english

File:

PDF, 242 KB

english, 1994

39

[IEEE 1994 IEEE GaAs IC Symposium - Phildelphia, PA, USA (16-19 Oct. 1994)] Proceedings of 1994 IEEE GaAs IC Symposium - An ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage

Fujii, M., Maeda, T., Ohno, Y., Tokushima, M., Ishikawa, M., Fukaishi, M., Hida, H.

Year:

1994

Language:

english

File:

PDF, 536 KB

english, 1994

40

[IEEE 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC - San Francisco, CA, USA (5-7 Feb. 1998)] 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156) - A 4.25 Gb/s CMOS fiber channel transceiver with asynchronous binary tree-type demultiplexer and frequency conversion architecture

Fukaishi, M., Nakamura, K., Sato, M., Tsulsui, Y., Kishi, S., Yotsuyanagi, M.

Year:

1998

Language:

english

File:

PDF, 1.28 MB

english, 1998

41

[IEEE IEEE 2001 Custom Integrated Circuits Conference - San Diego, CA, USA (6-9 May 2001)] Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169) - A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCO

Minami, K., Fukaishi, M., Mizuno, M., Onishi, H., Noda, K., Imai, K., Horiuchi, T., Yamaguchi, H., Sato, T., Nakamura, K., Yamashina, M.

Year:

2001

Language:

english

File:

PDF, 381 KB

english, 2001

42

[IEEE 15th Annual GaAs IC Symposium - San Jose, CA, USA (10-13 Oct. 1993)] 15th Annual GaAs IC Symposium - A novel high-speed low-power tri-state driver flip flop (TD-FF) for ultra-low supply voltage GaAs heterojunction FET LSIs

Maeda, T., Numata, K., Tokushima, M., Ishikawa, M., Fukaishi, M., HIda, H., Ohno, Y.

Year:

1993

Language:

english

File:

PDF, 417 KB

english, 1993

43

[IEEE 2006 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA (2006.02.6-2006.02.9)] 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers - Optical interconnect technologies for high-speed VLSI chips using silicon nano-photonics

Ohashi, K., Fujikata, J., Nakada, M., Ishi, T., Nishi, K., Yamada, H., Fukaishi, M., Mizuno, M., Nose, K., Ogura, I., Urino, Y., Baba, T.

Year:

2006

Language:

english

File:

PDF, 1.29 MB

english, 2006

44

[IEEE 2012 IEEE/MTT-S International Microwave Symposium - MTT 2012 - Montreal, QC, Canada (2012.06.17-2012.06.22)] 2012 IEEE/MTT-S International Microwave Symposium Digest - A 72% PAE, 95-W, single-chip GaN FET S-band inverse class-F power amplifier with a harmonic resonant circuit

Motoi, K., Matsunaga, K., Yamanouchi, S., Kunihiro, K., Fukaishi, M.

Year:

2012

Language:

english

File:

PDF, 811 KB

english, 2012

45

[IEEE 2009 Proceedings of ESSCIRC (ESSCIRC) - Athens, Greece (2009.09.14-2009.09.18)] 2009 Proceedings of ESSCIRC - A 60GHz power amplifier with 14.5dBm saturation power and 25% peak PAE in CMOS 65nm SOI

Siligaris, Alexandre, Hamada, Yasuhiro, Mounet, Christopher, Raynaud, Christine, Martineau, Baudouin, Deparis, Nicolas, Rolland, Nathalie, Fukaishi, Muneo, Vincent, Pierre

Year:

2009

Language:

english

File:

PDF, 1.36 MB

english, 2009

46

[IEEE 2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Montreal, QC, Canada (2012.06.17-2012.06.19)] 2012 IEEE Radio Frequency Integrated Circuits Symposium - A 0.3 – 3GHz reconfigurable digital transmitter with multi-bit envelope ΔΣ modulator using phase modulated carrier clock for wireless sensor networks

Hori, Shinichi, Kunihiro, Kazuaki, Hayakawa, Makoto, Fukaishi, Muneo

Year:

2012

Language:

english

File:

PDF, 417 KB

english, 2012

47

[IEEE 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. - Honolulu, HI, USA (June 15-17, 2006)] 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. - Daisy Chain for Power Reduction in Inductive-Coupling CMOS Link

Inoue, M., Miura, N., Niitsu, K., Nakagawa, Y., Tago, M., Fukaishi, M., Sakurai, T., Kuroda, T.

Year:

2006

Language:

english

File:

PDF, 972 KB

english, 2006

48

[IEEE 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (6-8 Feb. 1997)] 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers - A 4.25 GHz BiCMOS clock recovery circuit with an AV-DSPD architecture for NRZ data stream

Nakamura, S., Tajima, A., Kinoshita, Y., Suemura, Y., Fukaishi, M., Suzuki, H., Itani, T., Miyamoto, H., Henmi, N., Yamazaki, T., Yotsuyanagi, M.

Year:

1997

Language:

english

File:

PDF, 1.08 MB

english, 1997

49

[IEEE 2011 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Baltimore, MD, USA (2011.06.5-2011.06.7)] 2011 IEEE Radio Frequency Integrated Circuits Symposium - A 30MHz–2.4GHz CMOS receiver with integrated RF filter and dynamic-range-scalable energy detector for cognitive radio

Kitsunezuka, Masaki, Kodama, Hiroshi, Oshima, Naoki, Kunihiro, Kazuaki, Maeda, Tadashi, Fukaishi, Muneo

Year:

2011

Language:

english

File:

PDF, 955 KB

english, 2011

50

[IEEE 2011 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Baltimore, MD, USA (2011.06.5-2011.06.7)] 2011 IEEE Radio Frequency Integrated Circuits Symposium - A 0.7-3GHz envelope ΔΣ modulator using phase modulated carrier clock for multi-mode/band switching amplifiers

Hori, Shinichi, Kunihiro, Kazuaki, Takahashi, Kiyohiko, Fukaishi, Muneo

Year:

2011

Language:

english

File:

PDF, 369 KB

english, 2011

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